In wafer scale packaging, an entire wafer including a semiconductor substrate is packaged prior to being separated into individual semiconductor devices (chips or dies). The subsequently separated semiconductor devices may then be attached as separate, prepackaged components to other devices, such as printed circuit boards, by soldering or other attachment technique, to form various products. Wafer scale packaging thus increases efficiency in fabrication and assembly of semiconductor devices and products.
Wafers increasingly are formed from compound semiconductor materials as the semiconductor substrates, such as gallium arsenide (GaAs) and indium phosphide (InP), for example. The compound semiconductor materials provide improved electronic properties, resulting in faster semiconductor devices, such as transistors, diodes, light-emitting diodes, etc., than silicon based counterparts. However, compound semiconductor materials tend to be brittle, which increases the chances of cracking or fracturing, particularly during periods of high physical stress during manufacturing processes. For example, soldering a packaged semiconductor device requires application of heat, which may cause fractures in the compound semiconductor material, e.g., along cleavage planes.
FIG. 1 is a plan view of prior art wafer scale packaged semiconductor device 100, which includes semiconductor substrate 110 having a bottom surface 111. The bottom surface 111 includes three connecting strips 121-123, which may be formed from an electrically conductive material, such as gold, gold-tin alloy, or the like. The connecting strips 121-123 have corresponding exposed areas 121′-123′, which are respectively defined by an insulating material applied to the bottom surface 111 of the substrate 110 and the connecting strips 121-123. The exposed areas 121′-123′ enable the semiconductor device 100 to be soldered to a printed circuit board (not shown), for example.
As shown in FIG. 1, the exposed areas 121′-123′ are aligned along vertical line A-A′. Accordingly, when the semiconductor device 100 is soldered to the printed circuit board, e.g., by applying soldering paste or solder balls, the substrate 110 may tilt or rotate about the vertical line A-A′, resulting in a skewed orientation between the bottom surface 111 of the substrate 110 and the top surface of the printed circuit board. Further, although the connecting strips 121-123 provide physical support to the substrate 110, which helps to prevent cracks or fractures along cleavage planes of the substrate 110, the layout of the connecting strips 121-123 in FIG. 1 allows cleavage planes to run the width (or length) of the substrate 110 without intersecting any portion of the connecting strips 121-123, where the substrate 110 is susceptible to fracturing. The substrate 110 is particularly susceptible to fracturing along the straight edges of the connecting strips 121-123, as indicated, for example, by horizontal line B-B′ of FIG. 1.